The EPAC 1.0 test chip is ready for shipment, and contains a series of acceleration cores based on the RISC-V instruction set architecture.

EPI, a consortium of 28 partners from 10 countries, will receive 120 million euros from European Union taxpayers under Horizon 2020 to support its attempt to deliver European independence in HPC chip technologies and HPC infrastructure.

The test chip contains four vector processing micro-tiles (VPUs) composed of an Avispado RISC-V core designed by SemiDynamics Technology Services (Barcelona, ??Spain) and a vector processing unit designed by the Barcelona Supercomputing Center and the University of Zagreb.

Source: eenewseurope.com

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FlorinM                   gnulinux.ro
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